Flash Option Control Register (Flash_Optcr) - ST STM32F205 Programming Manual

Flash memory interface
Bits 9:8 PSIZE: Program size
Bit 7 Reserved, must be kept cleared.
Bits 6:3 SNB: Sector number
Bit 2 MER: Mass Erase
Bit 1 SER: Sector Erase
Bit 0 PG: Programming
2.8.6

Flash option control register (FLASH_OPTCR)

The FLASH_OPTCR register is used to modify the user option bytes.
Address offset: 0x14
Reset value: 0x0FFF AAED. The option bits are loaded with values from Flash memory at
reset release.
Access: no wait state when no Flash memory operation is ongoing, word, half-word and
byte access.
31 30 29 28
Reserved
15 14 13 12
rw rw rw rw
24/29
These bits select the program parallelism.
00 program x8
01 program x16
10 program x32
11 program x64
These bits select the sector to erase.
0000 sector 0
0001 sector 1
...
1011 sector 11
Others not allowed
Erase activated for all user sectors.
Sector Erase activated.
Flash programming activated.
27 26 25
rw rw rw
11 10 9
RDP[7:0]
rw rw rw
24 23 22
nWRP[11:0]
rw rw rw
8 7 6
nRST_ nRST_
STDBY STOP
rw rw rw
DocID15687 Rev 5
21 20 19
rw rw rw
5 4 3
WDG_
BOR_LEV
Reserv
SW
ed
rw rw
PM0059
18 17 16
rw rw rw
2 1 0
OPTST OPTLO
RT CK
rw rs rs