Opamp2 Control Register (Opamp2_Csr) - STMicroelectronics RM0365 Reference Manual

Operational amplifier (OPAMP)
Bits 3:2 VP_SEL: OPAMP1 Non inverting input selection.
These bits are set and cleared by software. They are used to select the OPAMP1 non inverting
input.
00: PA7 used as OPAMP1 non inverting input
01: PA5 used as OPAMP1 non inverting input
10: PA3 used as OPAMP1 non inverting input
11: PA1 used as OPAMP1 non inverting input
Bit 1 FORCE_VP:
This bit forces a calibration reference voltage on non-inverting input and disables external
connections.
0: Normal operating mode. Non-inverting input connected to inputs.
1: Calibration mode. Non-inverting input connected to calibration reference voltage.
Bit 0 OPAMP1EN: OPAMP1 enable.
This bit is set and cleared by software. It is used to enable the OPAMP1.
0: OPAMP1 is disabled.
1: OPAMP1 is enabled.
18.4.2

OPAMP2 control register (OPAMP2_CSR)

Address offset: 0x3C
Reset value: 0xXXXX 0000
31 30 29 28
OUT TSTR
LOCK
CAL EF
rw r rw
15 14 13 12
PGA_GAIN CALSEL
rw rw
Bit 31 LOCK: OPAMP 2 lock
This bit is write-once. It is set by software. It can only be cleared by a system reset.
This bit is used to configure the OPAMP2_CSR register as read-only.
0: OPAMP2_CSR is read-write.
1: OPAMP2_CSR is read-only.
Bit 30 OUTCAL:
OPAMP output status flag, when the OPAMP is used as comparator during calibration.
0: Non-inverting < inverting
1: Non-inverting > inverting.
Bit 29 TSTREF:
This bit is set and cleared by software. It is used to output the internal reference voltage
(V
REFOPAMP2
0: V
REFOPAMP2
1: V
REFOPAMP2
Bits 28:24 TRIMOFFSETN: Offset trimming value (NMOS)
Bits 23:19 TRIMOFFSETP: Offset trimming value (PMOS)
433/1080
27 26 25 24
TRIMOFFSETN
rw
11 10 9 8
CAL VMS_
VPS_SEL
ON SEL
rw rw rw
).
is output.
is not output.
DocID025202 Rev 7
23 22 21 20
TRIMOFFSETP
rw
7 6 5
TCM_
VM_SEL Res.
EN
rw rw
19 18 17
USER_
PGA_GAIN
TRIM
rw
4 3 2 1
FORCE
VP_SEL
_VP
rw rw
RM0365
16
rw
0
OPAMP
2EN
rw