Adc Regular Data Register (Adcx_Dr, X=1 - STMicroelectronics RM0365 Reference Manual

Analog-to-digital converters (ADC)
15.5.14

ADC regular Data Register (ADCx_DR, x=1

Address offset: 0x40
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
r r r
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 RDATA[15:0]: Regular Data converted
These bits are read-only. They contain the conversion result from the last converted regular channel.
The data are left- or right-aligned as described in
377/1080
28 27 26 25
Res. Res. Res.
12 11 10 9
r r r r
DocID025202 Rev 7
..
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
RDATA[15:0]
r r r r
Section 15.3.26: Data
2)
20 19 18
Res. Res. Res.
4 3 2
r r r
management.
RM0365
17 16
Res. Res.
1 0
r r