STMicroelectronics RM0365 Reference Manual page 135

Advanced arm-based 32-bit mcus
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Reset and clock control (RCC)
Bit 16 TIM15RST: TIM15 timer reset
Set and cleared by software.
Bit 15 SPI4RST: SPI4 reset (only on STM32F302xD/E devices)
Set and cleared by software.
Bit 14 USART1RST: USART1 reset
Set and cleared by software.
Bit 13 Reserved, must be kept at reset value.
Bit 12 SPI1RST: SPI1 reset (STM32F302xB/C/D/E devices only)
Set and cleared by software.
Bit 11 TIM1RST: TIM1 timer reset
Set and cleared by software.
Bits 10:1 Reserved, must be kept at reset value.
Bit 0 SYSCFGRST: SYSCFG, Comparators and operational amplifiers reset
Set and cleared by software.
135/1080
0: No effect
1: Reset TIM15 timer
0: No effect
1: Reset SPI4
0: No effect
1: Reset USART1
0: No effect
1: Reset SPI1
0: No effect
1: Reset TIM1 timer
0: No effect
1: Reset SYSCFG, COMP, and OPAMP
DocID025202 Rev 7
RM0365

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