Rs232 Hardware Flow Control And Rs485 Driver Enable; Using Usart; Figure 335. Reception Using Dma; Figure 336. Hardware Flow Control Between 2 Usarts - STMicroelectronics RM0365 Reference Manual

Universal synchronous asynchronous receiver transmitter (USART)
Error flagging and interrupt generation in multibuffer communication
In multibuffer communication if any error occurs during the transaction the error flag is
asserted after the current byte. An interrupt is generated if the interrupt enable flag is set.
For framing error, overrun error and noise flag which are asserted with RXNE in single byte
reception, there is a separate error flag interrupt enable bit (EIE bit in the USART_CR3
register), which, if set, enables an interrupt after the current byte if any of these errors occur.
29.5.16

RS232 hardware flow control and RS485 driver enable

using USART

It is possible to control the serial data flow between 2 devices by using the CTS input and
the RTS output. The
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Figure 335. Reception using DMA

Figure 336 shows how to connect 2 devices in this mode:

Figure 336. Hardware flow control between 2 USARTs

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RM0365