Figure 239. Tim16/Tim17 Block Diagram - STMicroelectronics RM0365 Reference Manual

RM0365
1. The internal break event source can be:
- A clock failure event generated by CSS. For further information on the CSS, refer to
system (CSS)
- A PVD output
- SRAM parity error signal
®
- Cortex-M4 F LOCKUP (Hardfault) output
- COMP output

Figure 239. TIM16/TIM17 block diagram

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General-purpose timers (TIM15/TIM16/TIM17)
Section 9.2.7: Clock security
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