Figure 294. Transfer Sequence Flowchart For Slave Receiver With Nostretch=0 - STMicroelectronics RM0365 Reference Manual

Advanced arm-based 32-bit mcus
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RM0365
Inter-integrated circuit (I2C) interface
Slave receiver
RXNE is set in I2C_ISR when the I2C_RXDR is full, and generates an interrupt if RXIE is
set in I2C_CR1. RXNE is cleared when I2C_RXDR is read.
When a STOP is received and STOPIE is set in I2C_CR1, STOPF is set in I2C_ISR and an
interrupt is generated.

Figure 294. Transfer sequence flowchart for slave receiver with NOSTRETCH=0

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