Ahb Peripheral Reset Register (Rcc_Ahbrstr) - STMicroelectronics RM0365 Reference Manual

Reset and clock control (RCC)
9.4.11

AHB peripheral reset register (RCC_AHBRSTR)

Address: 0x28
Reset value: 0x0000 0000
Access: no wait states, word, half-word and byte access
31 30 29
ADC12
Res Res Res
RST
15 14 13
Res Res Res
1. Only on STM32F302xDxE.
Bits 31:29 Reserved, must be kept at reset value.
Bit 28 ADC12RST: ADC1 and ADC2 reset (only ADC1 on STM32F302x6/8 devices)
Set and reset by software.
0: does not reset the ADC1 and ADC2
1: resets the ADC1 and ADC2
Bits 27:25 Reserved, must be kept at reset value.
Bit 24 TSCRST: Touch sensing controller reset
Set and cleared by software.
0: No effect
1: Reset TSC
Bit 23 IOPGRST: I/O port G reset. (Only on STM32F302xDxE)
Set and cleared by software.
0: No effect
1: Reset I/O port G
Bit 22 IOPFRST: I/O port F reset
Set and cleared by software.
0: No effect
1: Reset I/O port F
Bit 21 OPERST: I/O port E reset (STM32F302xB/C devices only)
Set and cleared by software.
0: No effect
1: Reset I/O port E
Bit 20 IOPDRST: I/O port D reset
Set and cleared by software.
0: No effect
1: Reset I/O port D
Bit 19 IOPCRST: I/O port C reset
Set and cleared by software.
0: No effect
1: Reset I/O port C
147/1080
28 27 26 25
Res Res Res
rw
12 11 10 9
Res Res Res Res
24 23 22
IOPGR
TSC IOPF
(1)
RST RST
ST
rw rw rw
8 7 6
Res Res Res
DocID025202 Rev 7
21 20 19 18
IOPE IOPD IOPC IOPB
RST RST RST RST
rw rw rw rw
5 4 3 2
FMCR
Res Res Res
(1)
ST
RM0365
17 16
IOPHR
IOPA
(1)
RST
ST
rw rw
1 0
Res Res