Operational amplifier (OPAMP)
1. This figure gives an example in an inverting configuration. Any other option is possible, including
comparator mode.
Programmable Gain Amplifier mode
The Programmable Gain Amplifier (PGA) mode is enabled by writing the VM_SEL bits to 10
in the OPAMPx_CR register. The gain is set using the PGA_GAIN bits which must be set to
0x00..0x11 for gains ranging from 2 to 16.
In this case, the inverting inputs are internally connected to the central point of a built-in gain
setting resistive network.
inverting input not used
An alternative option in PGA mode allows you to route the central point of the resistive
network on one of the I/Os connected to the non-inverting input. This is enabled using the
PGA_GAIN bits in OPAMPx_CR register:
•
10xx values are setting the gain and connect the central point to one of the two
available inputs
•
11xx values are setting the gain and connect the central point to the second available
input
This feature can be used for instance to add a low-pass filter to PGA, as shown in
Figure 126: PGA mode, internal gain setting (x2/x4/x8/x16), inverting input used for
Please note that the cut-off frequency is changed if the gain is modified (refer to the
electrical characteristics section of the datasheet for details on resistive network elements.
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Figure 124. Follower configuration
Figure 125: PGA mode, internal gain setting (x2/x4/x8/x16),
shows the internal connection in this mode.
DocID025202 Rev 7
RM0365
filtering.
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