Inter-integrated circuit (I2C) interface
Bus error
Arbitration loss
Overrun/Underrun
PEC error
Timeout/t
SMBus Alert
Depending on the product implementation, all these interrupts events can either share the
same interrupt vector (I2C global interrupt), or be grouped into 2 interrupt vectors (I2C event
interrupt and I2C error interrupt). Refer to Section: Interrupt and exception vectors for
details.
In order to enable the I2C interrupts, the following sequence is required:
1.
Configure and enable the I2C IRQ channel in the NVIC.
2.
Configure the I2C to generate interrupts.
The I2C wakeup event is connected to the EXTI controller (refer to
interrupts and events controller
817/1080
Table 150. I2C Interrupt requests (continued)
Interrupt event
error
LOW
Figure 314. I2C interrupt mapping diagram
DocID025202 Rev 7
Event flag/Interrupt
Event flag
BERR
ARLO
OVR
PECERR
Write PECERRCF=1
TIMEOUT
Write TIMEOUTCF=1
ALERT
(EXTI)).
Interrupt enable
clearing method
Write BERRCF=1
Write ARLOCF=1
Write OVRCF=1
Write ALERTCF=1
Section 13.2: Extended
RM0365
control bit
ERRIE
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