Opamp Registers; Opamp1 Control Register (Opamp1_Csr) - STMicroelectronics RM0365 Reference Manual

Advanced arm-based 32-bit mcus
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Operational amplifier (OPAMP)
18.4

OPAMP registers

18.4.1

OPAMP1 control register (OPAMP1_CSR)

Note:
This register is only available in STM32F302xB/C/D/E devices.
Address offset : 0x38
Reset value: 0xXXXX 0000
31
30
29
TSTR
LOCK OUTCAL
EF
rw
r
rw
15
14
13
PGA_GAIN
CALSEL
rw
rw
Bit 31 LOCK: OPAMP 1 lock
This bit is write-once. It is set by software. It can only be cleared by a system reset.
This bit is used to configure the OPAMP1_CSR register as read-only.
0: OPAMP1_CSR is read-write.
1: OPAMP1_CSR is read-only.
Bit 30 OUTCAL:
OPAMP output status flag, when the OPAMP is used as comparator during calibration.
0: Non-inverting < inverting
1: Non-inverting > inverting.
Bit 29 TSTREF:
This bit is set and cleared by software. It is used to output the internal reference voltage
(V
REFOPAMP1
0: V
REFOPAMP1
1: V
REFOPAMP1
Bits 28:24 TRIMOFFSETN: Offset trimming value (NMOS)
Bits 23:19 TRIMOFFSETP: Offset trimming value (PMOS)
Bit 18 USER_TRIM: User trimming enable.
This bit is used to configure the OPAMP offset.
0: User trimming disabled.
1: User trimming enabled.
431/1080
28
27
26
25
TRIMOFFSETN
rw
12
11
10
9
CAL
VPS_SEL
ON
rw
rw
).
is output.
is not output.
DocID025202 Rev 7
24
23
22
TRIMOFFSETP
8
7
6
VMS_SE
TCM_
VM_SEL
L
EN
rw
rw
rw
21
20
19
18
USER_
TRIM
rw
rw
5
4
3
2
Res.
VP_SEL
rw
RM0365
17
16
PGA_GAIN
rw
1
0
FORCE
OPAMP
_VP
1EN
rw
rw

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