Real-time clock (RTC)
27.6.19
RTC backup registers (RTC_BKPxR)
Address offset: 0x50 to 0x8C
Backup domain reset value: 0x0000 0000
System reset: not affected
31
30
29
rw
rw
rw
15
14
13
rw
rw
rw
Bits 31:0 BKP[31:0]
27.6.20
RTC register map
Offset
Register
RTC_TR
0x00
Reset value
RTC_DR
0x04
Reset value
RTC_CR
0x08
Reset value
RTC_ISR
0x0C
Reset value
RTC_PRER
0x10
Reset value
RTC_WUTR
0x14
Reset value
RTC_ALRMAR
0x1C
Reset value
0
763/1080
28
27
26
25
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
The application can write or read data to and from these registers.
They are powered-on by V
System reset, and their contents remain valid when the device operates in low-power mode.
This register is reset on a tamper detection event, as long as TAMPxF=1.
Table 135. RTC register map and reset values
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
0
0
0
DocID025202 Rev 7
24
23
22
BKP[31:16]
rw
rw
rw
8
7
6
BKP[15:0]
rw
rw
rw
when V
is switched off, so that they are not reset by
BAT
DD
HT
HU[3:0]
[1:0]
0
0
0
0
0
0
0
YT[3:0]
YU[3:0]
WDU[2:0]
0
0
0
0
0
0
0
0
OSE
L
[1:0]
0
0
0
0
0
0
0
0
PREDIV_A[6:0]
1
1
1
1
1
1
1
0
1
HT
HU[3:0]
[1:0]
0
0
0
0
0
0
0
0
21
20
19
rw
rw
rw
5
4
3
rw
rw
rw
MNT[2:0]
MNU[3:0]
0
0
0
0
0
0
0
MU[3:0]
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PREDIV_S[14:0]
0
0
0
0
0
0
0
1
WUT[15:0]
1
1
1
1
1
1
1
1
MNT[2:0]
MNU[3:0]
0
0
0
0
0
0
0
0
RM0365
18
17
16
rw
rw
rw
2
1
0
w
rw
rw
ST[2:0]
SU[3:0]
0
0
0
0
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
1
WUCKS
EL[2:0]
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
ST[2:0]
SU[3:0]
0
0
0
0
0
0
0
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