STMicroelectronics RM0365 Reference Manual page 224

Advanced arm-based 32-bit mcus
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RM0365
Bits 31:1 Reserved, must be kept at reset value.
Bit 0 PRx: Pending bit on line x (x = 32)
0: No trigger request occurred
1: Selected trigger request occurred
This bit is set when the selected edge event arrives on the external interrupt line.
This bit is cleared by writing a '1' into the bit.
DocID025202 Rev 7
Interrupts and events
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226

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