Nor/Psram Address Mapping; Table 43. Nor/Psram Bank Selection; Table 44. Nor/Psram External Memory Address; Figure 30. Fmc Memory Banks - STMicroelectronics RM0365 Reference Manual

Flexible static memory controller (FSMC)
14.4.1

NOR/PSRAM address mapping

HADDR[27:26] bits are used to select one of the four memory banks as shown in
1. HADDR are internal AHB address lines that are translated to external memory.
The HADDR[25:0] bits contain the external memory address. Since HADDR is a byte
address whereas the memory is addressed at word level, the address actually issued to the
memory varies according to the memory data width, as shown in the following table.
Memory width
8-bit
16-bit
231/1080

Figure 30. FMC memory banks

Table 43. NOR/PSRAM bank selection

(1)
HADDR[27:26]
00
01
10
11

Table 44. NOR/PSRAM External memory address

(1)
Data address issued to the memory
HADDR[25:0]
HADDR[25:1] >> 1
DocID025202 Rev 7
Selected bank
Bank 1 - NOR/PSRAM 1
Bank 1 - NOR/PSRAM 2
Bank 1 - NOR/PSRAM 3
Bank 1 - NOR/PSRAM 4
Maximum memory capacity (bits)
RM0365
Table
64 Mbytes x 8 = 512 Mbit
64 Mbytes/2 x 16 = 512 Mbit
43.