Power control (PWR)
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Bit 8 EWUP1: Enable WKUP1 pin
This bit is set and cleared by software.
0: WKUP1 pin is used for general purpose I/O. An event on the WKUP1 pin does
not wakeup the device from Standby mode.
1: WKUP1 pin is used for wakeup from Standby mode and forced in input pull
down configuration (rising edge on WKUP1 pin wakes-up the system from
Standby mode).
Note: This bit is reset by a system Reset.
Bits 7:3 Reserved, must be kept at reset value.
Bit 2 PVDO: PVD output
This bit is set and cleared by hardware. It is valid only if PVD is enabled by the
PVDE bit.
0: V
/V
DD
DDA
1: V
/V
DD
DDA
Notes:
1.
The PVD is stopped by Standby mode. For this reason, this bit is equal to 0
after Standby or reset until the PVDE bit is set.
2.
Once the PVD is enabled and configured in the PWR_CR register, PVDO can
be used to generate an interrupt through the External Interrupt controller.
3.
Once the PVD_LOCK is enabled (for CLASS B protection) PVDO cannot be
disabled anymore.
Bit 1 SBF: Standby flag
This bit is set by hardware and cleared only by a POR/PDR (power on reset/power
down reset) or by setting the CSBF bit in the
0: Device has not been in Standby mode
1: Device has been in Standby mode
Bit 0 WUF: Wakeup flag
This bit is set by hardware and cleared by a system reset or by setting the CWUF
bit in the
Power control register (PWR_CR)
0: No wakeup event occurred
1: A wakeup event was received from the WKUP pin or from the RTC alarm
Note: An additional wakeup event is detected if the WKUP pin is enabled (by
setting the EWUP bit) when the WKUP pin level is already high.
DocID025202 Rev 7
is higher than the PVD threshold selected with the PLS[2:0] bits.
is lower than the PVD threshold selected with the PLS[2:0] bits.
Power control register (PWR_CR)
RM0365
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