Table 61. Fmc_Bcrx Bit Fields; Figure 39. Modec Write Access Waveforms - STMicroelectronics RM0365 Reference Manual

Advanced arm-based 32-bit mcus
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Flexible static memory controller (FSMC)
The differences compared with mode1 are the toggling of NOE and the independent read
and write timings.
Bit No.
31-21
20
19
18:16
15
14
13
12
11
10
9
8
7
6
5-4
3-2
247/1080

Figure 39. ModeC write access waveforms

Table 61. FMC_BCRx bit fields

Bit name
Reserved
0x000
CCLKEN
As needed
CBURSTRW
0x0 (no effect in asynchronous mode)
Reserved
0x0
ASYNCWAIT
Set to 1 if the memory supports this feature. Otherwise keep at 0.
EXTMOD
0x1
WAITEN
0x0 (no effect in asynchronous mode)
WREN
As needed
WAITCFG
Don't care
WRAPMOD
0x0
WAITPOL
Meaningful only if bit 15 is 1
BURSTEN
0x0
Reserved
0x1
FACCEN
0x1
MWID
As needed
MTYP
0x02 (NOR Flash memory)
DocID025202 Rev 7
Value to set
RM0365

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