Syscfg External Interrupt Configuration Register 2; (Syscfg_Exticr2) - STMicroelectronics RM0365 Reference Manual

System configuration controller (SYSCFG)
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:12 EXTI3[3:0]: EXTI 3 configuration bits
Bits 11:8 EXTI2[3:0]: EXTI 2 configuration bits
11.1.3

SYSCFG external interrupt configuration register 2

(SYSCFG_EXTICR2)

Address offset: 0x0C
Reset value: 0x0000 0000
175/1080
These bits are written by software to select the source input for the EXTI3 external
interrupt.
x000: PA[3] pin
x001: PB[3] pin
x010: PC[3] pin
x011: PD[3] pin
x100: PE[3] pin
other configurations: reserved
These bits are written by software to select the source input for the EXTI2 external
interrupt.
x000: PA[2] pin
x001: PB[2] pin
x010: PC[2] pin
x011: PD[2] pin
x100: PE[2] pin
x101: PF[2] pin
other configurations: reserved
Bits 7:4 EXTI1[3:0]: EXTI 1 configuration bits
These bits are written by software to select the source input for the EXTI1 external
interrupt.
x000: PA[1] pin
x001: PB[1] pin
x010: PC[1] pin
x011: PD[1] pin
x100: PE[1] pin
x101: PF[1] pin
other configurations: reserved
Bits 3:0 EXTI0[3:0]: EXTI 0 configuration bits
These bits are written by software to select the source input for the EXTI0 external
interrupt.
x000: PA[0] pin
x001: PB[0] pin
x010: PC[0] pin
x011: PD[0] pin
x100: PE[0] pin
x101: PF[0] pin
other configurations: reserved
Note: Some of the I/O pins mentioned in the above register may not be available
on small packages.
DocID025202 Rev 7
RM0365