Figure 17. Basic Structure Of An I/O Port Bit; Figure 18. Basic Structure Of A Five-Volt Tolerant I/O Port Bit - STMicroelectronics RM0365 Reference Manual

Advanced arm-based 32-bit mcus
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RM0365
registers. In this way, there is no risk of an IRQ occurring between the read and the modify
access.
Figure 17
bit, respectively.

Figure 18. Basic structure of a five-volt tolerant I/O port bit

1. V
is a potential specific to five-volt tolerant I/Os and different from V
DD_FT
and
Figure 18
show the basic structures of a standard and a 5 V tolerant I/O port
Table 30
gives the possible port bit configurations.

Figure 17. Basic structure of an I/O port bit

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General-purpose I/Os (GPIO)
.
DD
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