System Configuration Controller (Syscfg); Syscfg Registers; Syscfg Configuration Register 1 (Syscfg_Cfgr1) - STMicroelectronics RM0365 Reference Manual

RM0365
11

System configuration controller (SYSCFG)

The STM32F302xx devices feature a set of configuration registers. The main purposes of
the system configuration controller are the following:
•
Enabling/disabling I
•
Remapping some DMA trigger sources from TIM16, TIM17, TIM6, DAC1_CH1 and
ADC2 to different DMA channels
•
Remapping the memory located at the beginning of the code area
•
Managing the external interrupt line connection to the GPIOs
•
Remapping TIM1 ITR3 source
•
Remapping DAC1 triggers
•
Managing robustness feature
•
Configuring encoder mode
11.1

SYSCFG registers

11.1.1

SYSCFG configuration register 1 (SYSCFG_CFGR1)

This register is used for specific configurations on memory remap.
Two bits are used to configure the type of memory accessible at address 0x0000 0000.
These bits are used to select the physical remap by software and so, bypass the BOOT pin
and the option bit setting.
After reset these bits take the value selected by the BOOT pin (BOOT0) and by the option
bit (BOOT1).
Address offset: 0x00
Reset value: 0x7C00 000X (X is the memory mode selected by the BOOT0 pin and BOOT1
option bit)
31 30 29 28
FPU_IE[5..0]
rw rw rw rw
15 14 13 12
TIM6_
TIM17_
DAC1_
Res Res DMA_
DMA_
RMP
RMP
rw rw
1. These bits are reserved in STM32F302x6/x8
2. Only for STM32F302xD/E devices
2
C Fm+ on some I/O ports
27 26 25
Res
rw rw
11 10 9
TIM16_
DMA_ Res Res
RMP
rw
DocID025202 Rev 7
System configuration controller (SYSCFG)
24 23 22 21
I2C3_ ENCODER_ I2C2_
FMP MODE FMP
rw rw rw
8 7 6
ADC2_ DAC_
TIM1_ USB_
DMA_ TRIG_
ITR3_ IT_
(1) (1)
RMP RMP
RMP RMP
rw rw rw rw
20 19 18
I2C_ I2C_
I2C1_
PB9_ PB8_
FMP
FMP FMP
rw rw rw
5 4 3 2
MEM_
MODE
Res Res
(2)
17 16
I2C_ I2C_
PB7_ PB6_
FMP FMP
rw rw
1 0
MEM_MODE
rw rw
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