Figure 206. Counter Timing Diagram, Internal Clock Divided By N; Figure 207. Counter Timing Diagram, Update Event With Arpe=1 (Counter Underflow) - STMicroelectronics RM0365 Reference Manual

Advanced arm-based 32-bit mcus
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General-purpose timers (TIM2/TIM3/TIM4)
RM0365

Figure 206. Counter timing diagram, internal clock divided by N

Figure 207. Counter timing diagram, Update event with ARPE=1 (counter underflow)

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