STMicroelectronics RM0365 Reference Manual page 218

Advanced arm-based 32-bit mcus
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RM0365
Bits 28:0 MRx: Event Mask on external/internal line x
Bit 30 MRx: Event Mask on external/internal line x (x = 30)
0: Event request from Line x is masked
1: Event request from Line x is not masked
Bit 29 Reserved, must be kept at reset value.
0: Event request from Line x is masked
1: Event request from Line x is not masked
DocID025202 Rev 7
Interrupts and events
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