Multi-Master Communication; Figure 344. Master And Three Independent Slaves - STMicroelectronics RM0365 Reference Manual

RM0365
1. NSS pin is not used on master side at this configuration. It has to be managed internally (SSM=1, SSI=1) to
prevent any MODF error.
2. As MISO pins of the slaves are connected together, all slaves must have the GPIO configuration of their
MISO pin set as alternate function open-drain (see
page 160.
30.5.4

Multi-master communication

Unless SPI bus is not designed for a multi-master capability primarily, the user can use build
in feature which detects a potential conflict between two nodes trying to master the bus at
the same time. For this detection, NSS pin is used configured at hardware input mode.
The connection of more than two SPI nodes working at this mode is impossible as only one
node can apply its output on a common data line at time.
When nodes are non active, both stay at slave mode by default. Once one node wants to
overtake control on the bus, it switches itself into master mode and applies active level on
the slave select input of the other node via dedicated GPIO pin. After the session is
Serial peripheral interface / inter-IC sound (SPI/I2S)

Figure 344. Master and three independent slaves

DocID025202 Rev 7
Section 10.3.7: I/O alternate function input/output on
908/1080
959