Rising Trigger Selection Register (Exti_Rtsr1); Falling Trigger Selection Register (Exti_Ftsr1) - STMicroelectronics RM0365 Reference Manual

Advanced arm-based 32-bit mcus
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Interrupts and events
13.3.3

Rising trigger selection register (EXTI_RTSR1)

Address offset: 0x08
Reset value: 0x0000 0000
31
30
29
Res.
TR30
Res.
Res.
rw
15
14
13
TR15
TR14
TR13
TR12
rw
rw
rw
Bits 29:23 Reserved, must be kept at reset value.
Bits 22:0 TRx: Rising trigger event configuration bit of line x (x = 22 to 0)
Note:
The external wakeup lines are edge-triggered. No glitches must be generated on these
lines. If a rising edge on an external interrupt line occurs during a write operation in the
EXTI_RTSR register, the pending bit is not set.
Rising and falling edge triggers can be set for the same interrupt line. In this case, both
generate a trigger condition.
13.3.4

Falling trigger selection register (EXTI_FTSR1)

Address offset: 0x0C
Reset value: 0x0000 0000
31
30
29
Res.
TR30
Res.
Res.
rw
15
14
13
TR15
TR14
TR13
TR12
rw
rw
rw
Bits 29:23 Reserved, must be kept at reset value.
Bits 22:0 TRx: Falling trigger event configuration bit of line x (x = 22 to 0)
219/1080
28
27
26
25
Res.
Res.
Res.
12
11
10
9
TR11
TR10
TR9
rw
rw
rw
rw
Bit 31 Reserved, must be kept at reset value.
Bit 30 TRx: Rising trigger event configuration bit of line x (x = 30)
0: Rising trigger disabled (for Event and Interrupt) for input line
1: Rising trigger enabled (for Event and Interrupt) for input line.
0: Rising trigger disabled (for Event and Interrupt) for input line
1: Rising trigger enabled (for Event and Interrupt) for input line.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
TR11
TR10
TR9
rw
rw
rw
rw
Bit 31 Reserved, must be kept at reset value.
Bit 30 TRx: Falling trigger event configuration bit of line x (x = 30)
0: Falling trigger disabled (for Event and Interrupt) for input line
1: Falling trigger enabled (for Event and Interrupt) for input line.
0: Falling trigger disabled (for Event and Interrupt) for input line
1: Falling trigger enabled (for Event and Interrupt) for input line.
24
23
22
Res.
Res.
TR22
rw
8
7
6
TR8
TR7
TR6
rw
rw
rw
24
23
22
Res.
Res.
TR22
rw
8
7
6
TR8
TR7
TR6
rw
rw
rw
DocID025202 Rev 7
21
20
19
18
TR21
TR20
TR19
TR18
rw
rw
rw
rw
5
4
3
2
TR5
TR4
TR3
TR2
rw
rw
rw
rw
21
20
19
18
TR21
TR20
TR19
TR18
rw
rw
rw
rw
5
4
3
2
TR5
TR4
TR3
TR2
rw
rw
rw
rw
RM0365
17
16
TR17
TR16
rw
rw
1
0
TR1
TR0
rw
rw
17
16
TR17
TR16
rw
rw
1
0
TR1
TR0
rw
rw

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