Figure 3.5.2 Reset Operation Flowchart - Fujitsu F2MC-8L MB89620 Series Hardware Manual

3.5 Resets
3.5.2 Reset Operation
When the CPU wakes up from a reset, the CPU selects the read address of the mode
data and reset vector according to the mode pin settings, then performs a mode fetch.
The mode fetch is performed after the oscillation stabilization delay time has passed
when power is turned on to a product with power-on reset, or on wake-up from stop
mode by a reset. If a reset occurs during a write to RAM on a product without the
power-on reset option, the contents of the RAM address cannot be assured.
n Overview of Reset Operation
During reset
operation
Mode fetch
(reset operation)
Normal operation
(RUN state)
54
CHAPTER 3 CPU
External reset input
Software reset
Watchdog reset
NO
Power-on reset
selected?
NO
Power-on or stop mode?
Oscillation stabilization
delay reset state
Wakes up from external
Fetch mode data
Fetch reset vector
Fetch the instruction code from the address
indicated by the reset vector and begin execution.

Figure 3.5.2 Reset Operation Flowchart

Power-on reset
YES
YES
Oscillation stabilization
delay reset state
NO
reset?
YES
Modify state and function of
external bus mode related pins
(optional)
Initialize pin states
based on the mode
pin values
MB89620 series