Peg Control Register; Zygo Axis Error Status List - Newport XPS Programmer's Manual

XPS Unified
EDH0373En1023 — 01/18
6.5.5

PEG Control Register

The bit assignments of the PEG Control register are listed below. The PEG Enable
Control and PEG Disable Control fields control the overall operation of the PEG
subsystem.
Bit
1:0 PEG Pulse Width (00 = 25 ns, 01 = 50 ns, 10 = 75 ns, 11 = 100 ns)
2 Enable P1->P2 operation
3 Enable P2->P1 operation
4 PEG Axis Select (0 = axis 1, 1 = axis 2)
5 PEG Output Enable
6 PEG Output Polarity (0 = Low pulse, 1 = High pulse)
7 Enable Delta 2
PEG Disable Control
0 = NO_EXIT = Don't disable
1 = P1_EXIT = Disable at P1 exit
10:8
2 = P2_EXIT = Disable at P2 exit
3 = ANY_EXIT = Disable at P1 or P2 exit
4 = IMM_EXIT = Disable immediately
11 PEG P2 Delta (0 = Delta 1, 1 = Delta 2)
PEG Enable Control
0 = NO_ENT = Don't enable
13:12 1 = P1_ENT = Enable at P1 entry
2 = P2_ENT = Enable at P2 entry
3 = ANY_ENT = Enable at P1 or P2 entry
15:14 Reserved
6.5.6

ZYGO Axis Error Status List

code
0
0x0001
0x0002
0x0004
0x0008
0x0010
0x0020
0x0040
0x0100
0x0200
0x0400
0x0800
0x1000
0x2000
0x4000
0x8000
The axis error status register is read via Ethernet. A XPS controller error is generates
when one or several bits of Error mask are ON. In this case, the group goes to
NOTINIT state.
Error Status description
Success
Reference signal is missing
Reference PLL Error
System Error
Measure Signal Missing
Measure Signal Dropout
Measure Signal Glitch
Velocity Error
Acceleration Error
36 bit Position Overflow
32 bit Position Overflow
P2 External Sample
Not used
PEG Error
Not used
IRQ Pending
40
Programmer's Manual
Description
Error mask
1
1
1
1
0
1
1
0
1
1
0
0
0
0
0