CONFIGURATION SETTINGS
Demonstration circuit SCP-ADP5070-EVALZ is a dual out-
put DC-DC converter designed to create a dual polarity
regulated voltage for powering several signal chains. The
positive regulator provides 15V/1A of output while the
negative regulator delivers –15V/300mA.
Each output of the SCP-ADP5070-EVALZ is resistor-pro-
grammable from |5V| to |39V|. The board can be also con-
figured to drive VIOC-capable linear regulators.
OUTPUT VOLTAGE PROGRAMMING
⎛
⎞
R
+V
= 0 .8 V 1 +
FT1
⎝ ⎜
⎠ ⎟
OUT
R
FB1
R
(
FT2
−V
= 0 .8 V −
1 .6 V − 0 .8 V
OUT
R
FB2
Table 2. Resistor Selection Guide for Common Output Voltages
|V
| (V)
R
(Ω)
OUT
FT1
5.0
105k
5.5
107k
6.0
71.5k
6.5
97.6k
7.0
78.7k
7.5
115k
8.0
102k
8.5
162k
9.0
205k
9.5
150k
10.0
115k
11.0
255k
12.0
140k
13.0
210k
14.0
165k
15.0
442k
16.0
215k
17.0
232k
18.0
215k
19.0
232k
20.0
255k
25.0
357k
30.0
365k
35.0
590k
39.0
487k
DEMO MANUAL SCP-ADP5070-EVALZ
)
R
(Ω)
R
(Ω)
R
FB1
FT2
FB2
20.0k
115k
18.2k
226k
11.0k
113k
13.7k
93.1k
10.2k
392k
13.7k
169k
11.3k
110k
16.9k
137k
20.0k
162k
13.7k
137k
10.0k
137k
20.0k
174k
10.0k
115k
13.7k
280k
10.0k
255k
24.9k
232k
11.3k
210k
11.5k
255k
10.0k
267k
10.2k
280k
10.7k
294k
11.8k
442k
10.0k
412k
13.7k
511k
10.2k
200k
ENABLE PIN CONFIGURATION
The EN1 and EN2 pins are tied to the optional SCP Run/Se-
quence headers P1 and P2. To create a harness for this
function, use Molex part 0510650300 with crimp pin
50212-8000.
The pins allow for a high, low or precision adjustment for
undervoltage lockout (UVLO) if desired. To set both chan-
nels high with pinstrapping (default), use 0W for R3 and
R5. To use an active run signal, use a 100kW resistor for
either pull-up or pull-down resistors R3, R4, R5 and R6
and use the drive signal from connectors P1 and P2. Table
6 contains additional startup sequence options.
If precision UVLO operation is desired, program the ena-
ble pins such that:
⎛
= 2 .8 0 V 1 +
⎝ ⎜
V
UVL O_1
(Ω)
⎛
15.8k
= 2 .8 0 V 1 +
⎝ ⎜
V
UVL O_2
28.7k
13.3k
With 100kW internal R
10.2k
⎛
40.2k
= 2 .5 5 V 1 +
⎝ ⎜
V
UVL O_1
16.2k
10.0k
= 2 .5 5 V 1 +
V
UVL O_2
11.8k
13.3k
10.7k
10.2k
11.8k
7.15k
16.2k
13.7k
11.8k
10.0k
11.5k
11.3k
11.3k
11.3k
13.7k
10.7k
11.5k
40.2k
⎞
R3
⎠ ⎟
R4
⎞
R5
⎠ ⎟
R6
, size R4 and R6 such that:
HYST
⎞
R3
⎠ ⎟
R4
⎛
⎞
R5
⎝ ⎜
⎠ ⎟
R6
Rev. 0
3
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