Dtp Operation; Figure 9.4.2A Timing To Cancel The External Interrupt At The End Of Dtp Operation; Figure 9.4.2B Sample Interface To The External Peripheral - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

9.4.2 DTP operation

To activate the intelligent I/O service, the user program initially sets the address of a register, assigned
between 000000
the user program sets the start address of the memory buffer in the buffer address pointer.
The DTP operation sequence is almost the same as for external interrupts. The operation is identical until
the CPU activates the hardware interrupt processing microprogram. Then, for the DTP, control is
transferred to the intelligent I/O service processing microprogram, since the ISE bit read by the CPU within
the hardware interrupt processing microprogram indicates the DTP. Once the intelligent I/O service is
activated, a read or write signal is sent to the addresses external peripheral, and data is transferred
between the peripheral and the chip. The external peripheral must cancel the interrupt request to this chip
within three machine cycles after the transfer is made. When the transfer is completed, the descriptor is
updated, and the interrupt controller generates a signal that clears the transfer cause. Upon receiving the
signal to clear the transfer cause, this resource clears the flip-flop holding the cause and prepares for the
next request from the pin. For details of the intelligent I/O service processing, refer to the MB90700
Programming Manual.
Internal operation
Interrupt cause
Address bus pin
Data bus pin
Read signal
Write signal

Figure 9.4.2a Timing to cancel the external interrupt at the end of DTP operation

IRQ
Cancel within three machine
cycles after transfer.
MB90580 Series
and 0000FF , in the I/O address pointer of the intelligent I/O service descriptor. Then,
H H
Selecting and
reading
descriptor
Read address
Data, address
bus
DTP
MB90580

Figure 9.4.2b Sample interface to the external peripheral

Edge request or H level request
* When data is transferred from the I/O register to memory
in the intelligent I/O service
Write address
Read data
Cancel within three machine cycles.
Internal bus
INT
CORE
Write data
MEMORY
Chapter 9: DTP/External Interrupt
9.4 Operations
113