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Table 6-20. Raw Interrupt Status Register (HDMI_WP_IRQSTATUS_RAW) Field Descriptions (continued)
Bit
Field
0
CORE_INTR
SPRUGX9 – 15 April 2011
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Preliminary
Value
Description
Settable raw status for HDMI Core interrupt
R0
Software reset done, no pending action
W0
No action
R1
Software reset ongoing
W1
Set event
© 2011, Texas Instruments Incorporated
High-Definition Multimedia Interface (HDMI)
Registers
721
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