Texas Instruments TMS320C6A816 Series Technical Reference Manual page 651

C6-integra dsp+arm processors
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5.4
Use Cases And Tips
5.4.1 How to Set GPMC Timing Parameters for Typical Accesses
5.4.1.1
External Memory Attached to the GPMC Module
As discussed in the introduction to this chapter, the GPMC module supports the following external
memory types:
Asynchronous or synchronous, 8-bit or 16-bit-width memory or device
16-bit address/data-multiplexed or not multiplexed NOR flash device
8- or 16-bit NAND flash device
The following examples show how to calculate GPMC timing parameters by showing a typical
parameter setup for the access to be performed.
The example is based on a 512-Mb multiplexed NOR flash memory with the following characteristics:
Type: NOR flash (address/data-multiplexed mode)
Size: 512M bits
Data Bus: 16 bits wide
Speed: 104 MHz clock frequency
Read access time: 80 ns
5.4.1.2
Typical GPMC Setup
Table 5-45
lists some of the I/Os of the GPMC module.
Signal Name
GPMC_FCLK
GPMC_CLK
GPMC_A[27:17]
GPMC_D[15: 0]
GPMC_CSx
GPMC_ADV_ALE
GPMC_OE_RE
GPMC_WE
GPMC_WAIT[1:0]
SPRUGX9 – 15 April 2011
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Preliminary
Table 5-45. GPMC Signals
I/O
Description
Internal
Functional and interface clock. Acts as the time reference.
O
External clock provided to the external device for synchronous operations
O
Address
I/O
Data-multiplexed with addresses A[16:1] on memory side
O
Chip-select (where x = 0, or 1)
O
Address valid enable
O
Output enable (read access only)
O
Write enable (write access only)
I
Ready signal from memory device. Indicates when valid burst data is ready to be read
© 2011, Texas Instruments Incorporated
Use Cases And Tips
General-Purpose Memory Controller (GPMC)
651

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