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Basic Programming Model
634
General-Purpose Memory Controller (GPMC)
Preliminary
Figure 5-42. Programming Model Top-Level Diagram
1. Enable GPMC clocks
2. Enable GPMC pads
NOR
4. NOR memory type
5. NOR chip-select
configuration
6. NOR timings
configuration
© 2011, Texas Instruments Incorporated
Start
3. Reset GPMC
NAND
What
protocol?
7. NAND memory type
8. NAND chip-select
configuration
9. Write operations
(asynchronous)
9. Read operations
(asynchronous)
10. ECC engine *
11. Prefetch and
write posting
engine *
12. Wait pin
configuration *
13. Enable
chip-select
* Optional
End
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SPRUGX9 – 15 April 2011
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