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Use Cases And Tips
5.4.2.5
Other Technologies
Other supported device type interact with the GPMC through the NOR interface protocol.
OneNAND Flash is a high-density and low-power memory device. It is based on single- or
multi-level-cell NAND core with SRAM and logic, and interfaces as a synchronous NOR Flash, plus has
synchronous write capability. It reads faster than conventional NAND and writes faster than
conventionnal NOR flash. Hence, it is appropriate for both mass storage and code storage.
pSRAM stands for pseudo-static random access memory. pSRAM is a low-power memory device for
mobile applications. pSRAM is based on the DRAM cell with internal refresh and address control
features, and interfaces as a synchronous NOR Flash, plus has synchronous write capability.
5.4.2.6
Supported Protocols
The GPMC supports the following interface protocols when communicating with external memory or
external devices:
•
Asynchronous read/write access
•
Asynchronous read page access (4-8-16 Word16)
•
Synchronous read/write access
•
Synchronous read burst access without wrap capability (4-8-16 Word16)
•
Synchronous read burst access with wrap capability (4-8-16 Word16)
5.4.2.7
GPMC Features and Settings
This section lists GPMC features and settings:
•
Supported device type: up to four NAND or NOR protocol external memories or devices
•
Operating Voltage: 3.3V
•
Maximum GPMC addressing capability: 512 MBytes divided into eight chip-selects
•
Maximum supported memory size: 256 MBytes (must be a power-of-2)
•
Minimum supported memory size: 16 MBytes (must be a power-of-2). Aliasing occurs when
addressing smaller memories.
•
Data path to external memory or device: 8- and 16-bit wide
•
Burst and page access: burst of 4-8-16 Word16
•
Supports bus keeping
•
Supports bus turn around
662
General-Purpose Memory Controller (GPMC)
Preliminary
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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