Texas Instruments TMS320C6A816 Series Technical Reference Manual page 677

C6-integra dsp+arm processors
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Table 5-68. GPMC_CONFIG3_i Field Descriptions (continued)
Bit
Field
6-4
ADVAADMUXONTIME
3-0
ADVONTIME
SPRUGX9 – 15 April 2011
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Preliminary
Value Description
ADV# assertion for first address phase when using the AAD-Multiplexed protocol
0
0 GPMC_FCLK cycle
1h
1 GPMC_FCLK cycle
7h
7 GPMC_FCLK cycles
ADV# assertion time from start cycle time
0
0 GPMC_FCLK cycle
1h
1 GPMC_FCLK cycle
Fh
15 GPMC_FCLK cycles
© 2011, Texas Instruments Incorporated
General-Purpose Memory Controller (GPMC)
Registers
677

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