Texas Instruments TMS320C6A816 Series Technical Reference Manual page 513

C6-integra dsp+arm processors
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3.3.2.50.33 Network Octet Frames Register (NETOCTETS)
The total number of bytes of frame data received and transmitted on the EMAC. Each frame counted
has all of the following:
Was any data or MAC control frame destined for any unicast, broadcast, or multicast address
(address match does not matter)
Was of any size (including less than 64-byte and greater than RXMAXLEN-byte frames)
Also counted in this statistic is:
Every byte transmitted before a carrier-loss was experienced
Every byte transmitted before each collision was experienced (multiple retries are counted each
time)
Every byte received if the EMAC is in half-duplex mode until a jam sequence was transmitted to
initiate flow control. (The jam sequence is not counted to prevent double-counting).
Error conditions such as alignment errors, CRC errors, code errors, overruns, and underruns do not
affect the recording of bytes in this statistic. The objective of this statistic is to give a reasonable
indication of Ethernet utilization.
3.3.2.50.34 Receive FIFO or DMA Start of Frame Overruns Register (RXSOFOVERRUNS)
The total number of frames received on the EMAC that had either a FIFO or DMA start of frame (SOF)
overrun. An SOF overrun frame is defined as having all of the following:
Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode
Was of any size (including less than 64-byte and greater than RXMAXLEN-byte frames)
The EMAC was unable to receive it because it did not have the resources to receive it (cell FIFO full
or no DMA buffer available at the start of the frame).
CRC errors, alignment errors, and code errors have no effect on this statistic.
3.3.2.50.35 Receive FIFO or DMA Middle of Frame Overruns Register (RXMOFOVERRUNS)
The total number of frames received on the EMAC that had either a FIFO or DMA middle of frame
(MOF) overrun. An MOF overrun frame is defined as having all of the following:
Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode
Was of any size (including less than 64-byte and greater than RXMAXLEN-byte frames)
The EMAC was unable to receive it because it did not have the resources to receive it (cell FIFO full
or no DMA buffer available after the frame was successfully started - no SOF overrun).
CRC errors, alignment errors, and code errors have no effect on this statistic.
3.3.2.50.36 Receive DMA Overruns Register (RXDMAOVERRUNS)
The total number of frames received on the EMAC that had either a DMA start of frame (SOF) overrun
or a DMA middle of frame (MOF) overrun. A receive DMA overrun frame is defined as having all of the
following:
Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode
Was of any size (including less than 64-byte and greater than RXMAXLEN-byte frames)
The EMAC was unable to receive it because it did not have the DMA buffer resources to receive it
(zero head descriptor pointer at the start or during the middle of the frame reception).
CRC errors, alignment errors, and code errors have no effect on this statistic.
SPRUGX9 – 15 April 2011
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Preliminary
© 2011, Texas Instruments Incorporated
Registers
513
EMAC/MDIO Module

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