Texas Instruments TMS320C6A816 Series Technical Reference Manual page 555

C6-integra dsp+arm processors
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GPMC Pin
GPMC_A[12]
GPMC_A[11]
GPMC_A[10]
GPMC_A[9]
GPMC_A[8]
GPMC_A[7]
GPMC_A[6]
GPMC_A[5]
GPMC_A[4]
GPMC_A[3]
GPMC_A[2]
GPMC_A[1]
GPMC_A[0]
GPMC_D[15]
GPMC_D[14]
GPMC_D[13]
GPMC_D[12]
GPMC_D[11]
GPMC_D[10]
GPMC_D[9]
GPMC_D[8]
GPMC_D[7]
GPMC_D[6]
GPMC_D[5]
GPMC_D[4]
GPMC_D[3]
GPMC_D[2]
GPMC_D[1]
GPMC_D[0]
With all device types, the GPMC does not drive unnecessary address lines. They stay at their reset
value of 00.
Address mapping supports address/data-multiplexed 16-bit wide devices:
The NOR flash memory controller still supports non-multiplexed address and data memory devices.
Multiplexing mode can be selected through the GPMC_CONFIG1_i[9-8] MUXADDDATA bit field (i =
0 to 7).
Asynchronous page mode is not supported for multiplexed address and data devices.
SPRUGX9 – 15 April 2011
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Preliminary
Table 5-2. GPMC Pin Multiplexing Options (continued)
Non Multiplexed
Non Multiplexed
Address Data
Address Data 8-Bit
16-Bit Device
Device
A11
A12
A10
A11
A9
A10
A8
A9
A7
A8
A6
A7
A5
A6
A4
A5
A3
A4
A2
A3
A1
A2
A0
A1
Not Used
A0
D15
Not Used
D14
Not Used
D13
Not Used
D12
Not Used
D11
Not Used
D10
Not Used
D9
Not Used
D8
Not Used
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
© 2011, Texas Instruments Incorporated
Multiplexed
16-Bit NAND
Address Data
Device
16-Bit Device
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
A16/D15
D15
A15/D14
D14
A14/D13
D13
A13/D12
D12
A12/D11
D11
A11/D10
D10
A10/D9
D9
A9/D8
D8
A8/D7
D7
A7/D6
D6
A6/D5
D5
A5/D4
D4
A4/D3
D3
A3/D2
D2
A2/D1
D1
A1/D0
D0
General-Purpose Memory Controller (GPMC)
Architecture
8-Bit NAND Device
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
D7
D6
D5
D4
D3
D2
D1
D0
555

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