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3.3.2.50 Network Statistics Registers
The EMAC has a set of statistics that record events associated with frame traffic. The statistics values
are cleared to zero 38 clocks after the rising edge of reset. When the GMII bit in the MACCONTROL
register is set, all statistics registers (see
subtracted from the register value with the result stored in the register. If a value greater than the
statistics value is written, then zero is written to the register (writing FFFF FFFFh clears a statistics
location). When the GMII bit is cleared, all statistics registers are read/write (normal write direct, so
writing 0000 0000h clears a statistics location). All write accesses must be 32-bit accesses.
The statistics interrupt (STATPEND) is issued, if enabled, when any statistics value is greater than or
equal to 8000 0000h. The statistics interrupt is removed by writing to decrement any statistics value
greater than 8000 0000h. The statistics are mapped into internal memory space and are 32-bits wide.
All statistics rollover from FFFF FFFFh to 0000 0000h.
31
LEGEND: R/W = Read/Write; WD = Write to decrement; -n = value after reset
3.3.2.50.1 Good Receive Frames Register (RXGOODFRAMES)
The total number of good frames received on the EMAC. A good frame is defined as having all of the
following:
•
Any data or MAC control frame that matched a unicast, broadcast, or multicast address, or matched
due to promiscuous mode
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had no CRC error, alignment error, or code error
See
Section 3.2.5.5
statistic.
3.3.2.50.2 Broadcast Receive Frames Register (RXBCASTFRAMES)
The total number of good broadcast frames received on the EMAC. A good broadcast frame is defined
as having all of the following:
•
Any data or MAC control frame that was destined for address FF-FF-FF-FF-FF-FFh only
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had no CRC error, alignment error, or code error
See
Section 3.2.5.5
statistic.
3.3.2.50.3 Multicast Receive Frames Register (RXMCASTFRAMES)
The total number of good multicast frames received on the EMAC. A good multicast frame is defined as
having all of the following:
•
Any data or MAC control frame that was destined for any multicast address other than
FF-FF-FF-FF-FF-FFh
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had no CRC error, alignment error, or code error
See
Section 3.2.5.5
statistic.
SPRUGX9 – 15 April 2011
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Preliminary
Figure
Figure 3-75. Statistics Register
COUNT
R/WD-0
for definitions of alignment, code, and CRC errors. Overruns have no effect on this
for definitions of alignment, code, and CRC errors. Overruns have no effect on this
for definitions of alignment, code, and CRC errors. Overruns have no effect on this
© 2011, Texas Instruments Incorporated
3-75) are write-to-decrement. The value written is
Registers
0
505
EMAC/MDIO Module
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