Hdmi-Cec Registers; Cec Control Register (Cec_Cr) - ST STM32G0 1 Series Reference Manual

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RM0444
39.7

HDMI-CEC registers

Refer to
39.7.1

CEC control register (CEC_CR)

Address offset: 0x00
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:3 Reserved, must be kept at reset value.
Bit 2 TXEOM: Tx end of message
The TXEOM bit is set by software to command transmission of the last byte of a CEC message.
TXEOM is cleared by hardware at the same time and under the same conditions as for TXSOM.
0: TXDR data byte is transmitted with EOM = 0
1: TXDR data byte is transmitted with EOM = 1
Note: TXEOM must be set when CECEN = 1.
TXEOM must be set before writing transmission data to TXDR.
If TXEOM is set when TXSOM = 0, transmitted message consists of 1 byte (HEADER) only
(PING message).
Bit 1 TXSOM: Tx start of message
TXSOM is set by software to command transmission of the first byte of a CEC message. If the CEC
message consists of only one byte, TXEOM must be set before of TXSOM.
Start-bit is effectively started on the CEC line after SFT is counted. If TXSOM is set while a message
reception is ongoing, transmission starts after the end of reception.
TXSOM is cleared by hardware after the last byte of the message is sent with a positive
acknowledge (TXEND = 1), in case of transmission underrun (TXUDR = 1), negative acknowledge
(TXACKE = 1), and transmission error (TXERR = 1). It is also cleared by CECEN = 0. It is not
cleared and transmission is automatically retried in case of arbitration lost (ARBLST = 1).
TXSOM can be also used as a status bit informing application whether any transmission request is
pending or under execution. The application can abort a transmission request at any time by
clearing the CECEN bit.
0: No CEC transmission is on-going
1: CEC transmission command
Note: TXSOM must be set when CECEN = 1.
TXSOM must be set when transmission data is available into TXDR.
HEADER first four bits containing own peripheral address are taken from TXDR[7:4], not from
CEC_CFGR.OAR that is used only for reception.
Section 1.2 on page 53
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
for a list of abbreviations used in register descriptions.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
RM0444 Rev 5
HDMI-CEC controller (CEC)
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
TXE
Res.
Res.
Res.
OM
rs
17
16
Res.
Res.
1
0
TXS
CECEN
OM
rs
rw
1357/1390
1364

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