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21Chapter 1 Overview
- 21Features
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24Chapter 1 Overview
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35Chapter 2 CPU
- 35Cpu
- 36Memory Space
- 40Registers
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45Chapter 2 CPU
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- 48Prefix Codes
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51Chapter 3 Memory
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55Chapter 3 Memory
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- 62Operations
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67Chapter 4 Clock and Reset
- 68Reset Causes
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71Chapter 5 Watchdog Timer, Timebase Timer, and Watch Timer Functions
- 71Outline
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72Chapter 5 Watchdog Timer, Timebase Timer, and Watch Timer Functions
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- 79Operation
- 80Watch Timer
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81Chapter 6 Low Power Control Circuit
- 81Outline
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83Chapter 6 Low Power Control Circuit
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- 87Operations
- 88Sleep Mode
- 89Stop Mode
- 89Watch Mode
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96Chapter 7 Interrupt
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101Chapter 7 Interrupt
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121Chapter 8 Parallel Ports
- 121Outline
- 122Block Diagram
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129Chapter 9 Dtp/External Interrupt
- 129Outline
- 129Block Diagram
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- 132Operations
- 133DTP Operation
- 135Notes On Use
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137Chapter 10 Delayed Interrupt Generation Module
- 137Outline
- 137Block Diagram
- 138Operations
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139Chapter 11 Communication Prescaler
- 139Outline
- 139Block Diagram
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- 141Operations
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143Chapter 12 UART
- 143Outline
- 144Block Diagram
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- 152Operations
- 152Operation Modes
- 159Notes On Use
- 159Application
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161Chapter 13 IE Bus
- 161Outline
- 162Block Diagram
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- 183Overview
- 190Transmit Data
- 193Bit Format
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- 194Operation
- 194Iebus Control
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