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Fujitsu FR60Lite Manuals
Manuals and User Guides for Fujitsu FR60Lite. We have
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Fujitsu FR60Lite manual available for free PDF download: Hardware Manual
Fujitsu FR60Lite Hardware Manual (509 pages)
32-BIT MICROCONTROLLER
Brand:
Fujitsu
| Category:
Microcontrollers
| Size: 7.41 MB
Table of Contents
Table of Contents
10
Chapter 1 Overview
16
Overview
17
Block Diagram
19
Package Dimension
20
Pin Assignment
22
Pin Description
24
I/O Circuit Types
33
Chapter 2 Handling Devices
36
Handling Devices
37
Chapter 3 Cpu and Control Units
40
Memory Space
41
Internal Architecture
43
Programming Model
48
Data Structure
55
Word Alignment
56
Memory Map
57
Branch Instructions
60
EIT (Exception/Interrupt/Trap)
63
Interrupt Level
64
ICR (Interrupt Control Register)
66
SSP (System Stack Pointer)
67
TBR (Table Base Register)
68
Multi-EIT Servicing
71
Operation
73
Operation Modes
77
Reset (Device Initialization)
79
Clock Generation Control
85
PLL Control
86
Oscillation Stabilization Wait Time and PLL Lock Wait Time
87
Clock Distribution
89
Clock Frequency Division
90
Block Diagram of the Clock Generation Control Unit
91
Registers in the Clock Generation Control Unit
92
Peripheral Circuits in the Clock Control Unit
105
Device Status Control
108
Chapter 4 I/O Ports
116
Overview of I/O Ports
117
Registers of I/O Port
119
Analog Input Ports
125
Chapter 5 Interrupt Controller
128
Overview
129
Interrupt Control Registers
133
Operation of Interrupt Controller
135
Chapter 6 External Interrupt and Nmi Controller
144
Overview of External Interrupt/Nmi Controller
145
Registers of External Interrupt/Nmi Controller
147
Operation of External Interrupt/Nmi Controller
149
Chapter 7 Realos-Related Hardware
156
Delayed Interrupt Module
157
Register of Delayed Interrupt Module
158
Operation of Delayed Interrupt Module
159
Bit Search Module
160
Register of Bit Search Module
161
Operation of Bit Search Module
163
Chapter 8 16-Bit Reload Timer
166
Overview
167
16-Bit Reload Timer Block Diagram
168
16-Bit Reload Timer Registers
169
Operation of 16-Bit Reload Timer
173
CHAPTER 9 PPG (Programmable Pulse Generator)
178
Overview
179
Block Diagram
183
Register of PPG
187
Operation Explanation
192
CHAPTER 10 PWC (Pulse Width Count: Pulse Width Measurement)
198
Overview
199
Block Diagram
200
Register of PWC
201
Operation Explanation
207
Chapter 11 Multifunctional Timer
218
Overview
219
Block Diagram
221
Pins of Multifunctional Timer
227
Multifunctional Timer Register
228
Compare Clear Buffer Register (CPCLRBH, CPCLRBL) /Compare Clear Register (CPCLRH, CPCLRL)
233
Timer Data Register (TCDTH, TCDTL)
235
Timer State Control Register (TCCSH, TCCSL)
236
A/D Trigger Control Register (ADTRGC)
241
Output Compare Buffer Register (OCCPBH0 to OCCPBH5, OCCPBL0 to OCCPBL5) / Output Compare Register (OCCPH0 to OCCPH5, OCCPL0 to OCCPL5)
242
Compare Control Register (OCSH0 to OCSH5, OCSL0 to OCSL5)
244
Compare Mode Control Register (OCMOD)
249
Input Capture Data Registers (IPCPH0 to IPCPH3, IPCPL0 to IPCPL3)
251
Input Capture State Control/Ppg Output Control Register (ICSH23, ICSL23, PICSH01, PICSL01)
252
16-Bit Dead Timer Register (TMRRH0 to TMRRH2, TMRRL0 to TMRRL2)
259
16-Bit Dead Timer Control Register (DTCR0 to DTCR2)
260
Waveform Control Register (SIGCR1, SIGCR2)
266
A/D Activation Compare Register (ADCOMP0, ADCOMP1, ADCOMP2, ADCOMPC)
269
Multifunctional Timer Interrupt
271
Operation of Multifunctional Timer
275
Operation of 16-Bit Free-Run Timer
276
Operation of 16-Bit Output Compare
282
Operation of 16-Bit Input Capture
292
Waveform Generator Operation
294
Operation of Timer Mode
298
Operation During Dead Time Timer Mode
300
DTTI Pin Control Operation
304
A/D Activation Compare Operation
306
Notes on Using Multifunctional Timer
307
Program Example of Multifunctional Timer
309
CHAPTER 12 U-TIMER (16-Bit Timer for UART Baud Rate Generation)
312
Overview
313
Description of Registers
314
Description of Operation
317
Chapter 13 Uart
318
Overview
319
Detail Description of Registers
322
Operation of UART
328
Example of Using the UART
334
Example of Setting Baud Rates and U-TIMER Reload Values
336
Chapter 14 8/10-Bit A/D Converter
339
Overview
339
Configuration
340
Pin
343
Registers
345
A/D Channel Control Register (ADCH)
346
A/D Mode Setting Register (ADMD)
348
A/D Control Status Register (ADCS)
351
A/D Data Register (ADCD)
354
Analog Input Control Register (AICR)
355
Interrupt
356
Operation Explanation
357
A/D Conversion Data Protection Function
361
Precautions on Using
362
Chapter 15 Multiplication and Addition Calculator
364
Overview
365
Register Description
370
Operation Explanation
374
Instruction Detail Explanation
378
CHAPTER 16 DMAC (DMA Controller)
382
Overview
383
Register Details Explanation
386
Operation Explanation
400
Setting up Transfer Request
402
Transfer Sequence
403
Overview of DMA Transfer
405
Operation Flow
413
Data Path
415
Chapter 17 Flash Memory
418
Overview of Flash Memory
419
Flash Memory Registers
424
Flash Memory Status Register (FLCR)
425
Flash Wait Register (FLWC)
427
Access Modes of Flash Memory
429
Starting the Flash Memory Automatic Algorithm
431
Automatic Algorithm Execution Status
435
Sector Protect Operation
441
Chapter 18 Serial Programming Connection
446
Overview
447
Appendix
452
APPENDIX A I/O Map
453
APPENDIX B Vector Table
461
APPENDIX C Pin Status in each CPU State
465
APPENDIX D Notes When Little Endian Area Is Used
468
APPENDIX E Instruction Lists
475
APPENDIX F Precautions on Handling
490
Index
494
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