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accumulation. PSCR[INIT] may also be used to clear the PSHR. PSHR is unaffected by system reset, thus
should be initialized by software before performing parallel signature operations.
32
Field
Reset
R/W
DCR
2.19.4
Parallel Signature Low Register (PSLR)
PSLR, shown in
Figure
2-58, provides signature information for the low word (bits 31-0) of the AHB data
read and data write buses. Writing PSLR initializes a seed value prior to enabling signature accumulation.
PSCR[INIT] can also be used to clear the PSLR. PSLR is unaffected by system reset, thus should be
initialized by software prior to performing parallel signature operations.
32
Field
Reset
R/W
DCR
2.19.5
Parallel Signature Counter Register (PSCTR)
PSCTR, shown in
Figure
on every accumulated transfer or on an mtdcr psulr,rS. Writing to PSCTR initializes a value before
enabling signature accumulation. PSCR[INIT] can also be used to clear PSCTR. PSCTR is unaffected by
system reset, thus should be initialized by software before performing parallel signature operations.
.
32
Field
Reset
R/W
DCR
Freescale Semiconductor
Figure 2-57. Parallel Signature High Register (PSHR)
Figure 2-58. Parallel Signature Low Register (PSLR)
2-59, provides count information for signature accumulation. It is incremented
Figure 2-59. Parallel Signature Counter Register (PSCTR)
e200z3 Power Architecture Core Reference Manual, Rev. 2
High signature
Unaffected
R/W
DCR 274
Low signature
Unaffected
R/W
DCR 275
Counter
Unaffected
R/W
DCR 276
Register Model
63
63
63
2-79
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