Freescale Semiconductor e200z3 Reference Manual page 168

Instruction Model
Opcode
Format
Extended
Primary
(Inst
(Inst )
21:31
0:5
X
111111 01000 01000 1
X
111111 10010 00111 0
X
111111 10010 00111 1
XFL
111111 10110 00111 0
XFL
111111 10110 00111 1
X
111111 11001 01110 /
X
111111 11001 01111 /
X
111111 11010 01110 /
Legend:
- Don't care, usually part of an operand field
/ Reserved bit, invalid instruction form if encoded as 1
? Allocated for implementation-dependent use. See User' Manual for the implementation
Table 3-13 lists all supported instructions, including VLE instructions.
Mnemonic
add Add
add. Add & record CR
addc Add Carrying
addc. Add Carrying & record CR
addco Add Carrying & record OV
addco. Add Carrying & record OV & CR
adde Add Extended with CA
adde. Add Extended with CA & record CR
addeo Add Extended with CA & record OV
addeo. Add Extended with CA & record OV & CR
addi Add Immediate
addic Add Immediate Carrying
addic. Add Immediate Carrying & record CR
addis Add Immediate Shifted
addme Add to Minus One Extended with CA
addme. Add to Minus One Extended with CA & record CR
3-40
Table 3-12. Instructions Sorted by Opcode (continued)
Mnemonic
)
fabs. Floating Absolute Value and record CR
mffs Move From FPSCR
mffs. Move From FPSCR and record CR
mtfsf Move To FPSCR Fields
mtfsf. Move To FPSCR Fields and record CR
fctid Floating Convert To Int Doubleword
fctidz Floating Convert To Int Doubleword with round to Zero
fcfid Floating Convert From Int Doubleword
Table 3-13. Full Instruction Listing
Instruction Name
e200z3 Power Architecture Core Reference Manual, Rev. 2
Instruction
Freescale Semiconductor
Source
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E
Book E