Freescale Semiconductor e200z3 Reference Manual page 397

The formats for program trace direct/indirect branch with synchronized messages and indirect branch
history with synchronized messages are shown in
(1–32 bits)
Branch History
Figure 10-26. Indirect Branch History with Synchronization Message Format
Exception conditions that result in program trace synchronization are summarized in
Exception Condition
System reset At the negation of JTAG reset, j_trst_b , queue pointers, counters, state machines, and registers within
negation the Nexus3/Nexus2+ module are reset. Upon the first branch out of system reset, if program trace is
enabled, the first program trace message is a direct/indirect branch with synchronization message.
Program trace The first program trace message, after program trace has been enabled, is a synchronization message.
enabled
Exit from low Upon exit from a low-power mode or debug mode, the next direct/indirect branch is converted to a
power/debug direct/indirect branch with synchronization message.
Queue overrun An error message occurs when the message queue is full and a new message cannot be queued. The
FIFO discards messages until it has completely emptied the queue. Once emptied, an error message
is queued. The error encoding indicates which types of messages attempted to be queued while the
FIFO was being emptied. The next BTM message in the queue is a direct/indirect branch with
synchronization message.
Periodic program A forced synchronization occurs periodically after 255 program trace messages have been queued. A
trace synchronization direct/indirect branch with synchronization message is queued. The periodic program trace message
counter then resets.
Event in If the Nexus module is enabled, assorting nex_evti_b initiates a direct/indirect branch with
synchronization message upon the next direct/indirect branch, if program trace is enabled and the EIC
bits of the DC1 register have enabled this feature.
Sequential instruction When the sequential instruction counter reaches its maximum count (up to 255 sequential instructions
count overflow may be executed), a forced synchronization occurs. The sequential counter then resets. A program
trace direct/indirect branch with synchronization message is queued upon execution of the next branch.
Attempted access to For SOCs that implement security, any attempted branch to secure memory locations temporarily
secure memory disables program trace and causes the corresponding BTM to be lost. The following direct/indirect
branch queues a direct/indirect branch with synchronization message. The count value within this
message will be inaccurate since the re-enable of program trace is not necessarily aligned on an
instruction boundary.
All messages have the following priority: WPM → OTM → BTM → DTM. A BTM message that attempts
Collision priority
to enter the queue at the same time as a watchpoint message or ownership trace message is lost. An
error message is sent indicating the BTM was lost. The following direct/indirect branch queues a
direct/indirect branch with synchronization message. The count value within this message reflects the
number of sequential instructions executed after the last successful BTM message was generated. This
count includes the branch that did not generate a message due to the collision.
Execution mode Whenever the CPU switches execution mode into or out of a sequence of VLE instructions, the next
switch branch trace message will be a Direct/Indirect Branch w/ Sync Message.
Freescale Semiconductor
Figure
(1–32 bits)
Full Target Address
Maximum length = 82 bit; Minimum length = 13 bits
Table 10-24. Program Trace Exception Summary
e200z3 Power Architecture Core Reference Manual, Rev. 2
10-26:
(1–8 bits)
Sequence
Count
Exception Handling
Nexus3/Nexus2+ Module
(4 bits) (6 bits)
Source TCODE
Process (011101)
Table 10-24.
10-31