Freescale Semiconductor e200z3 Reference Manual page 123

Table 2-41. Reset Settings for e200z3 Resources (continued)
Resource
CR
BUCSR
CSRR0
CSRR1
CTR
CTXCR
DAC1–DAC2
DVC1–DVC2
DBCNT
DBCR0–DBCR3
DBSR
DEAR
DEC
DECAR
DSRR0
DSRR1
ESR
HID0–HID1
IAC1–IAC4
IVOR0–IVOR15
IVOR32–IVOR34
IVPR
3
L1CFG0
LR
MAS0–MAS4, MAS6
MCSR
3
MMUCFG
MMUCSR0
MSR
PID0
3
PIR
3
PVR
SPEFSCR
Freescale Semiconductor
1
Unaffected
0x0000_0000
1
Unaffected
1
Unaffected
1
Unaffected
000 || NUMCTX || 00_0000_0000_0000_0000_0000_0000
0x0000_0000
1
Unaffected
1
Unaffected
0x0000_0000
0x1000_0000
1
Unaffected
1
Unaffected
1
Unaffected
1
Unaffected
1
Unaffected
0x0000_0000
0x0000_0000
0x0000_0000
1
Unaffected
1
Unaffected
1
Unaffected
—
1
Unaffected
1
Unaffected
0x0000_0000
—
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_00 || p_cpuid[0:7]
—
0x0000_0000
e200z3 Power Architecture Core Reference Manual, Rev. 2
System Reset Setting
Register Model
2
2-75