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Freescale Semiconductor e200z3 Reference Manual page 263

Power architecture core

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Table 6-6. SPE Complex Integer Instruction Timing (continued)

Instruction

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Freescale Semiconductor

Latency Throughput

12–32

12–32

12–32

12–32

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

e200z3 Power Architecture Core Reference Manual, Rev. 2

Instruction Pipeline and Execution Timing

Comments

Timings are data dependent

Timings are data dependent

6-25

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