Freescale Semiconductor e200z3 Reference Manual page 22

Table
Number
2-36 Additional Synchronization Requirements for SPRs............................................................ 2-62
2-37 Special-Purpose Registers..................................................................................................... 2-62
2-38 Reset Settings for e200z3 Resources .................................................................................... 2-65
2-39 PSCR Field Descriptions ...................................................................................................... 2-69
2-40 PSSR Field Descriptions ....................................................................................................... 2-69
3-1 List of Unsupported Instructions............................................................................................. 3-2
3-2 List of Optionally Supported Instructions............................................................................... 3-3
3-3 Implementation-Specific Instruction Summary ...................................................................... 3-3
3-4 Memory Synchronization and Reservation Instructions—e200z3-Specific Details............... 3-4
3-5 SPE APU Vector Multiply Instruction Mnemonic Structure .................................................. 3-7
3-6 Mnemonic Extensions for Multiply-Accumulate Instructions................................................ 3-8
3-7 SPE APU Vector Instructions ................................................................................................. 3-9
3-8 Vector and Scalar SPFP APU Floating-Point Instructions.................................................... 3-15
3-9 Embedded Floating-Point APU Options............................................................................... 3-16
3-10 Invalid Instruction Forms...................................................................................................... 3-17
3-11 Instructions Sorted by Mnemonic ......................................................................................... 3-18
3-12 Instructions Sorted by Opcode.............................................................................................. 3-29
3-13 Full Instruction Listing.......................................................................................................... 3-40
4-1 Interrupt Classifications .......................................................................................................... 4-2
4-2 Exceptions and Conditions...................................................................................................... 4-3
4-3 ESR Field Descriptions ........................................................................................................... 4-4
4-4 MSR Field Descriptions.......................................................................................................... 4-6
4-5 MCSR Field Descriptions ....................................................................................................... 4-7
4-6 IVPR Field Descriptions ......................................................................................................... 4-8
4-7 IVOR Register Fields.............................................................................................................. 4-9
4-8 IVOR Assignments ................................................................................................................. 4-9
4-9 Critical Input Interrupt Register Settings .............................................................................. 4-10
4-10 Machine Check Interrupt Register Settings .......................................................................... 4-12
4-11 Data Storage Interrupt Register Settings............................................................................... 4-13
4-12 ISI Exceptions and Conditions.............................................................................................. 4-14
4-13 Instruction Storage Interrupt Register Settings ..................................................................... 4-15
4-14 External Input Interrupt Register Settings ............................................................................ 4-15
4-15 Alignment Interrupt Register Settings .................................................................................. 4-16
4-16 Program Interrupt Register Settings...................................................................................... 4-17
4-17 Floating-Point Unavailable Interrupt Register Settings ........................................................ 4-18
4-18 System Call Interrupt Register Settings ................................................................................ 4-18
4-19 Decrementer Interrupt Register Settings............................................................................... 4-19
4-20 Fixed-Interval Timer Interrupt Register Settings .................................................................. 4-19
4-21 Watchdog Timer Interrupt Register Settings......................................................................... 4-20
4-22 Data TLB Error Interrupt Register Settings .......................................................................... 4-21
4-23 Instruction TLB Error Interrupt Register Settings ................................................................ 4-21
2
Tables
Title
e200z3 Power Architecture Core Reference Manual, Rev. 2
Page
Number
Freescale Semiconductor