Freescale Semiconductor e200z3 Reference Manual page 184

Instruction Model
Mnemonic
se_bctr Branch to Count Register
se_bctrl Branch to Count Register & Link
se_bgeni Bit Generate Immediate
se_bl Branch and Link
se_blr Branch to Link Register
se_blrl Branch to Link Register & Link
se_bmaski Bit Mask Generate Immediate
se_bseti Bit Set Immediate
se_btsti Bit Test Immediate
se_cmp Compare
se_cmph Compare Halfword
se_cmphl Compare Halfword Logical
se_cmpi Compare Immediate
se_cmpl Compare Logical
se_cmpli Compare Logical Immediate
se_extsb Extend Sign Byte
se_extsh Extend Sign Halfword
se_extzb Extend with Zeros Byte
se_extzh Extend with Zeros Halfword
se_illegal Illegal
se_isync Instruction Synchronize
se_lbz Load Byte and Zero
se_lhz Load Halfword and Zero
se_li Load Immediate
se_lwz Load Word and Zero
se_mfar Move from Alternate Register
se_mfctr Move From Count Register
se_mflr Move From Link Register
se_mr Move Register
se_mtar Move to Alternate Register
se_mtctr Move To Count Register
se_mtlr Move To Link Register
se_mullw Multiply Low Word
3-56
Table 3-13. Full Instruction Listing (continued)
Instruction Name
e200z3 Power Architecture Core Reference Manual, Rev. 2
Source
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
VLE (32-bit opcodes)
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