Freescale Semiconductor e200z3 Reference Manual page 6

Paragraph
Number
2.18.2 Synchronization Requirements for SPRs................................................................... 2-70
2.18.3 Special-Purpose Register Summary........................................................................... 2-71
2.18.4 Reset Settings............................................................................................................. 2-74
2.19 Parallel Signature Unit Registers ................................................................................... 2-76
2.19.1 Parallel Signature Control Register (PSCR).............................................................. 2-77
2.19.2 Parallel Signature Status Register (PSSR)................................................................. 2-78
2.19.3 Parallel Signature High Register (PSHR).................................................................. 2-78
2.19.4 Parallel Signature Low Register (PSLR) ................................................................... 2-79
2.19.5 Parallel Signature Counter Register (PSCTR)........................................................... 2-79
2.19.6 Parallel Signature Update High Register (PSUHR) .................................................. 2-80
2.19.7 Parallel Signature Update Low Register (PSULR).................................................... 2-80
3.1 Operand Conventions ...................................................................................................... 3-1
3.1.1 Data Organization in Memory and Data Transfers...................................................... 3-1
3.1.2 Alignment and Misaligned Accesses........................................................................... 3-1
3.1.3 e200z3 Floating-Point Implementation ....................................................................... 3-2
3.2 Unsupported Instructions and Instruction Forms............................................................. 3-2
3.3 Optionally Supported Instructions and Instruction Forms............................................... 3-2
3.4 Implementation-Specific Instructions.............................................................................. 3-3
3.5 BookE Instruction Extensions ......................................................................................... 3-3
3.6 Memory Access Alignment Support................................................................................ 3-4
3.7 Memory Synchronization and Reservation Instructions.................................................. 3-4
3.8 Branch Prediction ............................................................................................................ 3-5
3.9 Interruption of Instructions by Interrupt Requests........................................................... 3-5
3.10 e200z3-Specific Instructions............................................................................................ 3-6
3.10.1 Integer Select APU ...................................................................................................... 3-6
3.10.2 Debug APU.................................................................................................................. 3-6
3.10.3 Wait APU (e200z335 only).......................................................................................... 3-6
3.10.4 Volatile Context Save/Restore APU (e200z335 only) ................................................. 3-7
3.10.5 SPE APU Instructions.................................................................................................. 3-7
3.10.6 Embedded Vector and Scalar Single-Precision Floating-Point APU
Instructions ............................................................................................................ 3-15
3.10.6.1 Options for Embedded Floating-Point APU Implementations.............................. 3-16
3.11 Unimplemented SPRs and Read-Only SPRs ................................................................. 3-16
3.12 Invalid Instruction Forms............................................................................................... 3-17
3.13 Instruction Summary...................................................................................................... 3-17
3.13.1 Instruction Index Sorted by Mnemonic ..................................................................... 3-18
3.13.2 Instruction Index Sorted by Opcode .......................................................................... 3-29
vi
Contents
Title
Chapter 3
Instruction Model
e200z3 Power Architecture Core Reference Manual, Rev. 2
Page
Number
Freescale Semiconductor