Freescale Semiconductor e200z3 Reference Manual page 393

Power architecture core
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10.7.2.1
Indirect Branch Messages (History)
Indirect branches include all taken branches whose destination is determined at run time, interrupts, and
exceptions. If DC1[PTM] is set, indirect branch information is messaged out in the format shown in
Figure
10-18:
(1–32 bits)
Branch History
10.7.2.2
Indirect Branch Messages (Traditional)
If DC1[PTM] is cleared, indirect branch information is messaged out in the format shown in
(1–32 bits)
Relative Address
10.7.2.3
Direct Branch Messages (Traditional)
Direct branches, conditional or unconditional, are all taken branches whose destinations are fixed in the
instruction opcode. Direct branch information is messaged out in the format shown in
When DC1[PTM] is set, direct branch messages are not transmitted. Instead,
each direct branch or predicated instruction toggles a bit in the history
buffer.
10.7.2.4
Resource Full Messages
The resource full message is used in conjunction with the branch history messages. The resource full
message is generated when the internal branch/predicate history buffer is full. If synchronization is needed
at the time this message is generated, the synchronization is delayed until the next branch trace message
that is not a resource full message.
For history buffer overflow, the resource full message transmits a resource code (RCODE) of 0b0001 and
the current contents of the history buffer, including the stop bit, are transmitted in the resource data
(RDATA) field. This history information can be concatenated by the development tool with the
Freescale Semiconductor
Relative Address
Maximum length = 82 bit; Minimum length = 13 bits
Figure 10-18. Indirect Branch Message (History) Format
Maximum length = 50 bits; minimum length = 12 bits
Figure 10-19. Indirect Branch Message Format
(1–8 bits)
Sequence Count
Maximum Length = 18 bits; minimum length = 11 bits
Figure 10-20. Direct Branch Message Format
NOTE
e200z3 Power Architecture Core Reference Manual, Rev. 2
(1–32 bits)
(1–8 bits)
Sequence
Count
(1–8 bits)
(4 bits)
Sequence Count
Source Process
(4 bits)
Source Process
TCODE (000011)
Nexus3/Nexus2+ Module
(4 bits)
(6 bits)
Source
TCODE
Process
(011100)
Figure
10-19:
(6 bits)
TCODE (000100)
Figure
10-20:
(6 bits)
10-27

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