Freescale Semiconductor e200z3 Reference Manual page 427

Completion. Completion occurs when an instruction has finished executing, written back
any results, and is removed from the completion queue (CQ). When an instruction
completes, it is guaranteed that this instruction and all previous instructions can
cause no interrupts.
Context synchronization. An operation that ensures that all instructions in execution
complete past the point where they can produce an interrupt, that all instructions
in execution complete in the context in which they began execution, and that all
subsequent instructions are fetched and executed in the new context. Context
synchronization may result from executing specific instructions (such as isync or
rfi) or when certain events occur (such as an interrupt).
Copy-back operation. A cache operation in which a cache line is copied back to memory
to enforce cache coherency. Copy-back operations consist of snoop push-out
operations and cache cast-out operations.
D
Denormalized number. A nonzero floating-point number whose exponent has a reserved
value, usually the format's minimum, and whose explicit or implicit leading
significand bit is zero.
E
Effective address (EA). The 32-bit address specified for a load, store, or an instruction
fetch. This address is then submitted to the MMU for translation to either a
physical memory address or an I/O address.
Exception. A condition that, if enabled, generates an interrupt.
Execution synchronization. A mechanism by which all instructions in execution are
architecturally complete before beginning execution (appearing to begin
execution) of the next instruction. Similar to context synchronization but doesn't
force the contents of the instruction buffers to be deleted and refetched.
Exponent. In the binary representation of a floating-point number, the exponent is the
component that normally signifies the integer power to which the value two is
raised in determining the value of the represented number. See also Biased
exponent.
F
Fall-through (branch fall-through). A not-taken branch.
Fetch. Retrieving instructions from either the cache or main memory and placing them
into the instruction queue.
Finish. Finishing occurs in the last cycle of execution. In this cycle, the CQ entry is
updated to indicate that the instruction has finished executing.
Flush. An operation that causes a cache block to be invalidated and the data, if modified,
to be written to memory.
Freescale Semiconductor
e200z3 Power Architecture Core Reference Manual, Rev. 2
Glossary
Glossary-3