Freescale Semiconductor e200z3 Reference Manual page 295

Power architecture core
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Table 7-22. Descriptions of JTAG Interface Signals (continued)
Signal
I/O
j_capture_dr
O Capture DR. Indicates whether the TAP controller is in the Capture_DR state.
Meaning
j_shift_dr
O Shift DR. Indicates whether the TAP controller is in the Shift_DR state.
Meaning
j_update_gp_reg
O Update DR. Indicates whether the TAP controller is in the Update_DR state.
Meaning
j_gp_regsel
O Register select. Decoded from the OCMD[RS]. They are used to specify which external
general-purpose JTAG register to access using the core TAP controller.
Signal Name
j_gp_regsel[0]
j_gp_regsel[1]
j_gp_regsel[2]
j_gp_regsel[3]
j_gp_regsel[4]
j_gp_regsel[5]
j_gp_regsel[6]
j_gp_regsel[7]
j_gp_regsel[8]
j_gp_regsel[9]
j_gp_regsel[10]
j_gp_regsel[11]
j_en_once_regsel O Enable once register select. This control signal can be used by external security logic to help control
jd_enable_once . The external enable_OnCE register should be muxed onto the j_serial_data input.
During the Shift_DR state, j_serial_data is supplied to j_tdo .
Meaning
j_nexus_regsel
O External Nexus register select.
Meaning
j_lsrl_regsel
O LSRL register select.
Meaning
Freescale Semiconductor
State
Asserted—The TAP controller is in Capture_DR state.
Negated—The TAP controller is not in Capture_DR state.
State
Asserted—The TAP controller is in Shift_DR state.
Negated—The TAP controller is not in Shift_DR state.
State
Asserted—The TAP controller is in the Update_DR state, and OCMD[R/W] is low (write
command). j_gp_regsel[0:11] should be monitored to see which register, if any,
needs updating.
Negated—The TAP controller is not in the Update_DR state.
Type
RS
O
0x70
O
0x71
O
0x72
O
0x73
O
0x74
O
0x75
O
0x76
O
0x77
O
0x78
O
0x79
O
0x7A
O
0x7B
State
Asserted—A decode of OCMD[RS] indicates an external enable_OnCE register is
selected (0b1111110 encoding) for access using the core TAP controller.
State
Asserted—A decode of OCMD[RS] indicates an external Nexus register is selected
(0b1111100 encoding) for access using the core TAP controller.
Negated—No Nexus register is selected.
State
Asserted—A decode of OCMD[RS] indicates an external LSRL register is selected
(0b1111101 encoding) for access using the core TAP controller.
e200z3 Power Architecture Core Reference Manual, Rev. 2
External Core Complex Interfaces
Signal Description
7-27

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