Freescale Semiconductor e200z3 Reference Manual page 268

Instruction Pipeline and Execution Timing
In Table 6-9, 'optimal' means that one EA calculation occurs during the operation; 'good' means that
multiple EA calculations occur during the memory operation, which may cause additional bus activities
with multiple bus transfers; 'poor' means that the access generates an alignment interrupt.
Table 6-9. Performance Effects of Storage Operand Placement
Operand
Size
4 byte
2 byte
1 byte
lmw, stmw
String
Note:
Optimal: One EA calculation occurs.
Good: Multiple EA calculations occur, which may cause additional bus activities with multiple bus transfers.
Poor: Alignment Interrupt occurs.
6-30
Byte Alignment
4
<4
2
<2
1
4
<4
N/A
e200z3 Power Architecture Core Reference Manual, Rev. 2
Boundary Crossing*
None Cache Line
optimal --
good good
optimal --
good good
optimal --
good good
poor poor
Protection Boundary
--
good
--
good
--
good
poor
Freescale Semiconductor